The desired characteristics of a memory system for computer main memory are high speed, low power, nonvolatility, and low cost. Low cost is accomplished by a simple fabrication process and a small surface area. Dynamic random access memory (DRAM) cells are fast and expend little power, but have to be refreshed many times each second and require complex structures to incorporate a capacitor in each cell. Flash type EEPROM cells are non-volatile, have low sensing power, and can be constructed as a single device, but take microseconds to write and milliseconds to erase, which makes them too slow for many applications, especially for use in computer main memory. Conventional semiconductor memory cells such as DRAM, ROM, and EEPROM have current flow in the plane of the cell, i.e., “horizontal”, and therefore occupy a total surface area that is the sum of the essential memory cell area plus the area for the electrical contact regions, and therefore do not achieve their theoretical minimum cell area.
Unlike DRAM, magnetic memory cells that store information as an orientation of magnetization of a ferromagnetic region can hold stored information for long periods of time, and are thus nonvolatile. Certain types of magnetic memory cells that use the magnetic state to alter the electrical resistance of the materials near the ferromagnetic region are collectively known as magnetoresistive (MR) memory cells. An array of magnetic memory cells is often called magnetic RAM or MRAM.
Although many types of MR cells have been proposed for use in MRAM arrays, magnetic tunnel junction sensors (MTJ), also called tunnel valves, have shown the most promise. A magnetic tunnel junction (MTJ) includes two ferromagnetic layers separated by a non-magnetic, electrically insulating barrier layer, and the magnetoresistance results from the spin-polarized tunneling of conduction electrons between the two ferromagnetic layers. The tunneling current depends on the relative orientation of the magnetic moments of the two ferromagnetic layers. For example, when the magnetizations of the two ferromagnetic layers are parallel, electrical resistance through the sensor is at a minimum, and, conversely when the magnetizations of the ferromagnetic layers are antiparallel, the electrical resistance is at its maximum.
A MTJ cell used in a MRAM array generally has one of its ferromagnetic layers pinned in a desired direction (such as by exchange coupling with an anitferromagnetic material), while the other is free to rotate in response to a magnetic field. The MTJ cell may be designed so that the free ferromagnetic layer has a magnetic anisotropy, such as a shape induced anisotropy, that causes the magnetization of the free layer to tend to align in one of two directions, either parallel to the magnetization of the pinned layer or antiparallel to the magnetization of the pinned layer.
The MRAM array has a first set of parallel electrical lines that can be referred to as word lines and a second set of parallel electrical lines, termed bit lines, that are generally perpendicular to the word lines. Each MTJ cell connects a word line with a bit line. Conducting electrical currents in the word and bit lines associated in a particular cell generates magnetic fields that can be used to flip the magnetization of the free ferromagnetic layer, thereby switching the cell between a high and low resistance state as desired.
In order to provide effective non-volatile memory, the switched state of the MTJ cell must remain in its desired position, until it is desired that it be switched. However, the anisotropy energy of the free layer is often not sufficient to ensure that the cell will remain in its desired state. For example, magnetic stray fields from adjacent cells and lines can, in combination with thermal fluctuations, cause the free layer to spontaneously flip.
In order to overcome this problem, some researches have attempted to develop thermally assisted MRAM systems. An example of cell 100 from such a system can be seen with reference to FIG. 1. The cell includes a first magnetic layer FM1 102 that is exchange coupled to a layer of antiferromagnetic material 104 and second ferromagnetic layer FM2 106. The Curie temperatures of both ferromagnetic layers 102 and 106 (TC1 and TC2, respectively) are significantly higher than the blocking temperature of the antiferromagnetic layer 104 (TB). The blocking temperature of the antiferromagnetic material is that temperature at which the material ceases to exchange bias the ferromagnetic layer and often corresponds with the loss of antiferromagnetic order. A barrier layer 110 is sandwiched between the first and second ferromagnetic layers 104 and 106. An electrically conductive word line 112 and a perpendicular, electrically conductive bit line 114 (shown in cross section) are provided at opposite ends of the memory cell 100.
Those familiar with spin valve sensors will recognize the disclosed structure as being similar to a tunnel valve sensor designed for use in a hard disk drive wherein the second ferromagnetic layer 106 serves as a free layer and the first magnetic layer 102 serves as a pinned layer. However, in the presently described memory cell 100, the second ferromagnetic layer 106 exhibits sufficiently high magnetic coercivity to maintain the magnetization of the second magnetic layer fixed in a desired position even in the presence of magnetic fields from the word and bit lines 112, 114. Above TB the first ferromagnetic layer 102 exhibits low enough coercivity, so that its magnetization can be switched in the presence of magnetic fields from the word and bit lines 112, 114, while layer 106 exhibits high enough coercivity, so that its magnetization cannot be switched in the presence of magnetic fields from the word and bit lines 112, 114. When it is desired that the memory cell be switched from one memory state to another, heat can be provided by a heat source (not shown) to heat the memory cell to a temperature TW above the blocking temperature TB of the antiferromagnetic material 104, but below the Curie temperatures TC1 and TC2 of the two ferromagnetic layers 102 and 106 Heat can be provided by flowing a current through the word and bit lines 112, 114 or by an external heat source such as a laser or resistive heater. When TW is reached the strong pinning provided by the AFM layer 104 ceases and the magnetic state of the first magnetic layer 102 can be switched by magnetic fields from the word and bit lines. Once the magnetic state has been switched, the cell 100 is cooled below the blocking temperature of the AFM layer 104 and the first magnetic layer 102 is again strongly pinned by exchange coupling with the AFM layer 104. With the magnetization of the first and second magnetic layers strongly fixed, inadvertent flipping of the memory state of the sensor is avoided. A memory cell similar to that described above is described by J. M. Daughton and A.V. Pohm in the Journal of Applied Physics Volume 93, Number 10 pages 7304 through 7306 (15 May 2003).
While the above described heat assisted memory cell 100 effectively prevents flipping of the memory state, it does suffer from other drawbacks. For one thing, in order to achieve good pinning at room temperature an AFM with high blocking temperature needs to be employed. The reason is that the pinning strength of the antiferromagnet does not vanish instantaneously at a given temperature, but rather decreases almost linearly over a large temperature range. By way of example, the blocking temperature TB of 20 nm thick IrMn is ˜550 Kelvin. TB decreases with decreasing IrMn thickness, however the pinning at room temperature will generally also be lower and pinning still decreases over a large temperature range. Since good pinning at room temperature is desired, an antiferromagnetic layer with blocking temperature much higher than room temperature is preferred. Heating above and cooling back down from such a high blocking temperature takes a significant amount of time and requires a powerful heat source. This prior art concept thus requires heating the cell 100 well above the blocking temperature of the AFM layer 104 in order to ensure that the ferromagnetic layer 102 will be able to be switched. Therefore, the point of switching cannot be well controlled, and the process is undesirably slow.
Therefore, there remains a need for a magnetic memory cell having a well maintained magnetic memory state that can also be switched quickly. Such a memory cell would preferably not require heating to excessively high temperatures and would be able to be very quickly switched, preferably on timescales of the order of nanoseconds or below.